Secured MCU Breaker Experts!

Every decapsulation conversation eventually arrives at the same question, and it is not about acid. It is about how many layers of metal sit between the outside world and the floating gates. On a PIC16C54A the answer is one, and that single number changes the job from a multi-day delayer into an afternoon of selective etching.

Why the layer count comes first

A modern microcontroller stacks four to eight metal layers over the array, and each one has to come off without touching the layer below, because the array is only visible when nothing reflective is above it. That is the expensive part of the work: not opening the package, which is routine, but removing interconnect uniformly across a die whose topography was never designed to be opened. A part from the early single-metal era has none of that. Remove the passivation and the polysilicon floating gates are already the topographical feature you are looking at.

What this particular die gives you

The process is a coarse one by any later standard, with cell dimensions measured in whole microns and a program array of only 512 words by 12 bits. Large cells mean strong contrast under an optical microscope, and strong contrast means a bit can be classified from a single image rather than from a stack of them. The 18-pin package is also helpful in a mundane way: the die is small, the bond wires are short, and there is plenty of room around the cavity to work.

Where the etch stops, and why

Layer	What it is	Does it have to go
Epoxy body	Package	Yes, entirely
Passivation	Glass over the die	Yes, over the array
Metal 1	Interconnect	No, there is nothing above it
Polysilicon	Floating gates	No, this is the signal

The third row is the point. On a multi-metal part the interconnect sits above the cells and must be removed; here the interconnect is coplanar with what you want to see, and in most layouts it does not cross the array at all because the array is a regular block that the designer routed around.

Reading 512 words by eye

The array is small enough that a full read is a matter of a few dozen images and a stitching step. Each cell’s threshold state maps to a brightness, the brightness maps to a bit, and twelve bits make a word. The labour is in the bookkeeping, not the imaging, and the check is arithmetic: the reconstructed image should disassemble into instructions that make sense as a program. A block of cells that decodes to a plausible instruction stream is strong evidence the bit classification is right; a block that decodes to nonsense means the polarity or the word boundary is wrong.

What the hex file will not contain

Unlike the eight-pin parts, this one has no factory calibration word in the array. Its oscillator is either an external crystal or an RC network with an external resistor, so there is no per-die trim value to recover and nothing at the top of memory that behaves differently from code. What is missing instead is the configuration word, which on a twelve-bit core is outside the program counter’s reach and is programmed by a separate command. A file that stops at the last program word is complete as code and incomplete as a device description, and the difference shows up when the image is used to build a second unit rather than to read the first.

The one failure that ends the job

Etch past the passivation and the same chemistry starts on the aluminium that the bond wires are welded to. It happens quietly, because the die still looks intact from above while the weld has been undercut, and it is discovered when a probe touchdown lifts a pad and takes the wire with it. There is no recovery from that, which is why an etch on a single-unit job is timed conservatively and inspected between steps rather than run to a schedule taken from a different die.

What the deliverable looks like

A hex file in the ordinary sense, plus a note listing the configuration word, the polarity assumed for the optical classification, and the checksum of the reconstructed image. The note matters more than usual here because the read was made by eye: a reviewer needs to know which words were certain and which were inferred from a single marginal image. Where the die is too degraded for optics, the electrical alternative is the one described in probing the wider 55, and the general constraints are in breaking an IC. Format and verification follow extracting MCU code.

Some enquiries use the word open because the customer wants to see inside the chip, and some use it because that is the word in the trade. On the PIC16C52 they can point at very different work, because the windowed version of this part was built to be opened. A ceramic package with a quartz lid is not a barrier to be removed; it is a feature to be used.

What the window is for

Erasable parts were shipped in ceramic packages with a transparent lid so the array could be returned to all ones by exposing it to ultraviolet light. The lid is quartz because ordinary glass blocks the wavelength that matters. Once the charge is driven off the floating gates the part is blank, and the same socket that read it can program it again. That is why the order code carries a letter telling you the part is windowed, and why a stock of these parts can be reused indefinitely while the plastic version cannot.

Erase is a dose, not a duration

The data sheet specifies the erase as an integrated dose at a wavelength, and the practical instruction that follows is twenty minutes or so under a lamp of the stated intensity at a stated distance. Two failure modes account for most of the trouble. Under-erasing leaves cells that read as programmed on one pass and erased on the next, which produces a dump that changes between runs. Over-exposure is not usually harmful to the array but does cook the plastic of a socket, and repeated heating is what eventually kills the bond wires.

Why an erased windowed part is not a loss

For a customer whose goal is a working second unit rather than a copy of the original code, the window is the whole answer. Erase, reprogram with the image they already have, and the part is back in service. This is the cheapest outcome in the whole vocabulary of these jobs and it is routinely overlooked because the enquiry arrives as “the chip is protected, we need it opened”. The distinction between a part that is locked and a part that is merely full is the same one that PIC16LF54 protection turns on.

Where decapsulation is still required

Part variant	Package	Does opening mean decap
JW, ceramic, windowed	Ceramic with quartz lid	No, erase and reprogram
Plastic OTP, same die	Epoxy	Yes, and it is one way
Plastic, protection clear	Epoxy	No, read through the pins

The middle row is the one that destroys evidence: once the epoxy is gone the part cannot go back into the product, so the read has to be right the first time. The top row has no such risk, which is why the first question about any old PIC should be which package it is in.

What the window cannot tell you

Erasing a windowed part leaves no trace of what was in it, so the window is also a way to destroy the evidence while believing the part has been serviced. A part that arrives already erased, with a lid that has clearly been under a lamp, is a part whose contents are gone and whose history is now unknown. Recording the read, the checksum and the socket before the lamp goes on is the only way to answer the question later. It is dull bookkeeping and it is the difference between a documented device and an anecdote.

The sequence that pays

Read first, while the part still works, then erase, then reprogram from the image. Doing it in that order means a failed read costs nothing but the time, and the device is still returnable. Doing it the other way round, erase and hope, loses the original image permanently and turns a repair into a reverse engineering project. The order is worth writing into the work instruction, because under time pressure the temptation is always to reach for the lamp.

Limits worth stating up front

The window does nothing for a part whose protection is in a fuse that the erase cannot reach, and it does nothing for a die that has already lost charge to age. It also does nothing for the plastic part, which is the majority of what is found in the field. Where the part is plastic and the protection is set, the route is the one in decap of the 54A and decap of the 55, and the constraints of that work are described in breaking an IC. The 16C505 is in the same position, and its EEPROM question is a different one. Reading the array before the lamp is used is not caution for its own sake; it is the difference between a file and a memory of a file.

The first useful thing to say about a PIC16C505 is that it has no data EEPROM. The part carries 1024 twelve-bit words of one-time program memory and 72 bytes of RAM, and nothing else that survives a power cycle. A request to recover its EEPROM is therefore always a request for something else, and finding out which of three things is meant takes less time than quoting the wrong job.

The memory map, as it actually is

Program memory occupies a single array of 1024 words, addressed by a ten-bit counter, with the configuration word outside that range and reached by a separate command. RAM is 72 bytes, volatile, and gone when the supply drops. There is no byte-writable array, no EEPROM data sheet section, and no EEADR register on this die. The 14-pin package exposes twelve I/O lines, one of which doubles as the programming voltage input, and that is the entire storage and access story.

Three things people mean by “the EEPROM”

What they say	What is really there	What the job becomes
“the EEPROM inside the PIC”	The OTP program array	Array read, protection permitting
“the EEPROM next to the PIC”	A 93C46 or 24C02 on the board	A separate serial memory read
“the EEPROM on the board”	The whole board’s non-volatile store	Inventory first, then two jobs

The third row is not pedantry. Products built around this part usually keep calibration constants, hour meters and serial numbers in an external serial memory precisely because the microcontroller cannot store them, so the number the customer actually needs is often in the 93C46 and not in the PIC at all. Recovering the PIC first and discovering this afterwards is a week lost.

How to tell in ten minutes

Look at the board, not the part. A 93C46 sits on three or four lines with a chip select, and its pins are labelled CS, CLK, DI and DO. A 24C02 sits on two lines with pull-ups and no chip select. Either one can be read in circuit with a clip and a USB bridge, without touching the microcontroller, and without any risk to a device that still works. If there is no such part, the storage is inside the PIC and the OTP array is the target.

What recovery means in each case

For the external memory, recovery is a bus read and a decode: the contents come out as a byte stream whose field layout has to be inferred from how the firmware uses it, which is where the program image helps. For the OTP array, recovery means an array read, and the route depends on whether the code-protect bit is set. With protection clear the answer is an in-circuit read in minutes; with it set the route is the physical one described in breaking an IC and priced accordingly.

The mistake that costs a device

Reading an external EEPROM in circuit is safe. Reading the PIC in circuit on a live board is not always, because the programming voltage has to reach a pin that the rest of the circuit may be driving. On a 14-pin baseline part in a working product, the conservative sequence is to lift the programming pins rather than trust the surrounding logic, and where the board cannot be disturbed the part comes off. The trade-off between the two is the same one that governs in-circuit reads on the 12F509.

Where the 93C46 route ends

An external serial memory is easy to read and hard to interpret. The bytes come out in the order the firmware wrote them, which is rarely the order the customer expects, and the field boundaries exist only in the program that reads them. Two days of work is typical: an hour at the clip, and the rest matching offsets against the code. That is also the point at which the microcontroller image stops being an optional extra, because the layout of the external memory is defined by the code inside the PIC, and a partial decode is worse than no decode when the values feed a calibration.

Quoting it honestly

A quote for “PIC16C505 EEPROM recovery” that does not name which memory is being recovered is a quote for a guess. The honest version lists the three possibilities, prices the cheap one first, and states that the microcontroller read may turn out to be unnecessary. That is also the version that survives contact with the customer’s purchasing department, because it can be approved in stages. The older 18-pin parts in PIC16C52 and PIC16C54A are in the same position, and the same question applies to them.

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Two readings from a PIC12C509 can look equally empty in a hex viewer and mean opposite things. One is a part that is protecting 1024 words of real firmware; the other is a part that has never been programmed. Both produce a file that opens, both produce a checksum of some sort, and one of them is worth several thousand dollars of engineering while the other is worth the price of a blank chip.

What a protected read actually returns

The code-protect bit lives in the configuration word, which a twelve-bit program counter cannot address and which the programmer reaches with a separate command. Once it is set, the array does not refuse the read and does not return noise. It returns 0x000 for every address in the range. That is a legal instruction word on this core, the no-operation, so a dump of a protected part is a listing of NOPs from the reset vector to the top of memory, at the correct length, with no error reported anywhere.

Why an erased part looks different by exactly one bit pattern

An unprogrammed cell on this process reads as all ones, so a blank check returns 0xFFF. The distinction is a single nibble and it is easy to miss if the tool is only printing addresses and word values without interpretation. It becomes obvious the moment the file is disassembled: 0x000 disassembles to a run of no-operations, and 0xFFF does not disassemble to anything legal at all. A disassembler is therefore a better diagnostic than a hex viewer for this one question.

The check, in the order that saves money

Reading	What it is	What to do next
0xFFF everywhere	Never programmed	Discard, buy a blank
0x000 everywhere	Protection set, array intact	Physical route
Mixed, sensible opcodes	Protection clear	Verify and deliver
Mixed, but nonsense	Wrong part or wrong read clock	Re-read

The fourth row is common enough to be worth its own step. A 509 read as a 508, or a read clocked too fast for the internal oscillator, produces plausible-looking mismatches that are mistaken for encryption. The clock question is treated separately in PIC12F508 firmware, and the same test applies here.

What 0x000 tells you about the route

A uniform zero array is good news for the physical route, because it proves the array has not been erased since it was programmed. The protection bit does not clear the cells; it only stops the interface from reporting them. So the die still holds the customer’s code, and any route that reaches the cells directly will read it. What changes is the entry point: the serial programming interface is now a dead end, and the work moves to decapsulation and an optical or electrical read of the array itself.

Where the numbers stop being small

This part is one of the few where an optical read is routine rather than exotic. The cells are large, the array is only 1024 by 12, and the whole image fits in a few passes. That puts the cost of the physical route in the range of a single engineering day, which is why the answer to “is it worth it” is usually yes for a production file and usually no for a hobby project. The same arithmetic on a modern part with eight times the density is a different conversation.

A second read, taken slightly differently

One pass is not proof. Mature practice is to read the array twice with the supply at the low and high ends of the permitted range, then compare. Cells that changed are marginal, and on a part of this age marginal cells are the rule rather than the exception. A uniform zero array is unaffected by the exercise because it is not a measurement of the cells at all, but a file recovered from a cleared protection bit will differ between the two passes, and those differences tell the engineer which words to treat as uncertain when the image is rebuilt.

What to send with the enquiry

Send the reading, not the conclusion. A customer who says the part is protected and a customer who says the read came back empty are describing the same dump, and only one of them has looked at what the words disassemble to. The other habit worth forming is a blank check on a known-good part: two dumps, one protected and one erased, remove the ambiguity for good. When the file is in hand, the packing and verification steps are the ones described in extracting MCU code, and the wider family context is in breaking an IC.

A PIC12C508 holds 512 twelve-bit words and 511 of them are program. The last one is a measurement. Microchip trimmed each die’s internal oscillator at final test and stored the result at address 0x1FF, where the reset code is expected to fetch it and write it into OSCCAL. That word is why a code read from this part is not finished when the last instruction has been decoded.

What actually sits at the top of the array

The array is one-time programmable, organised as 512 words of twelve bits, and the programmer’s address counter runs to 0x1FF like any other location. Nothing marks the top word as special in the silicon. What makes it special is the convention: the assembler template places a movlw of that value at the reset vector, and the first few instructions of every build move it into the OSCCAL register before anything else happens. Skip the word and the code still assembles, still links at the right address, and still runs. It simply runs at whatever frequency the erased or default trim produces, which on this family is a spread wide enough to break any timing that matters.

Why a dump without it still looks complete

A read that stops at 0x1FE produces a file of the right length for 511 words and a checksum that is internally consistent, because the checksum was computed over the same shortened range. This is the trap: nothing in the file complains. The failure appears later, on the second device, as a serial port that returns framing errors at one baud rate and works at another, or as a watchdog timeout that fires a few percent early. Engineers then spend a day on the UART configuration, which is where the original firmware spent its own time, and never look at the top of the array.

What the protection bit does to that one word

The code-protect bit is in the configuration word, which on a twelve-bit core is not reachable by the program counter and is therefore addressed by a separate programming command. When it is set, reads of the array return zero, which decodes as a no-operation, across the whole range including 0x1FF. There is no exception carved out for the calibration word. That is worth stating plainly because customers often assume the trim value is “factory data” and therefore readable; on this part it is ordinary array content and it disappears with everything else.

Three routes, and what each returns

Route	What it reaches	What it costs
In-circuit read, protection clear	Full array including 0x1FF	Minutes, no risk
In-circuit read, protection set	0x000 everywhere	Nothing useful
Optical read of the array	Every cell, including the trim word	Decapsulation, days

The third row is the one that answers the question, and it is also the one that recovers the trim value rather than inferring it. Where the device is still alive and the protection is clear, the first row is enough and the whole job is a file transfer. The middle row is what most enquiries are actually sitting on.

When the word cannot be recovered

If the die is damaged, or the top word was never programmed because the design used an external crystal, there is a fallback that does not require the original value: calibrate the replacement. Program the image with any legal trim, run the device against a reference clock, and sweep OSCCAL until the output frequency matches. It takes an afternoon and a frequency counter, and it produces a unit that behaves correctly without pretending to be a bit copy. The distinction between a bit copy and a calibrated rebuild is the same one that separates the four objects in copying a microcontroller.

The question to ask before quoting

Ask what the second unit has to do. If it has to talk to the same bus at the same rate, the trim word is part of the deliverable and the route has to reach address 0x1FF. If it only has to demonstrate the algorithm on a bench, a default trim will do and the job is smaller. The sibling part PIC12C509 doubles the array and keeps the same convention at its own top address, and the low-voltage variant covered in PIC12LC508 moves the trim spread wider still. Format and verification of the resulting image are handled as described in extracting MCU code.

Every architecture has one number that constrains how code is written and, read backwards, constrains how a recovered image can be checked. On the PIC12C509A that number is two. The hardware stack holds two return addresses, a call from inside a called routine is legal but a call from inside that one is not, and the compiler or the assembly author who wrote the firmware knew it every time they wrote a CALL.

That makes the stack a free verification instrument. Once the image is out, the call graph can be built from the instruction stream, and any path that needs three levels is evidence of a bad read rather than evidence of a firmware bug. Very few parts offer so clean a test.

The rest of the device is unremarkable in the best sense: 1024 twelve-bit words of one-time-programmable program memory arranged as two pages of 512, 41 bytes of RAM, six I/O pins in an eight-pin package, thirty-three instructions, a watchdog, and a factory-trimmed internal oscillator whose calibration word sits at the top of the map.

The part in numbers

item	PIC12C509A
program memory	1024 by 12 bits, OTP
pages	2, selected by PA0 in the status register
return stack	2 levels, not readable by software
data RAM	41 bytes
I/O	6 pins, one input-only
interrupts	none
entry points	exactly one, address zero
calibration word	top program address

The stack row deserves emphasis because it is not observable from inside the part. There is no register that reports the stack pointer, no overflow flag, and no instruction that pushes or pops for data purposes. A program that overflows it does not trap; it wraps, and the return goes to whatever address was there two calls ago.

What a depth-three path means in a dump

When a recovered image shows a chain of calls three deep, exactly three explanations exist, and they can be separated.

The first is that the read is wrong at one instruction. A single bit error can turn a MOVF into a CALL, which manufactures a nesting level that the firmware never had. The check is positional: if the offending word sits at an address whose neighbours are inconsistent with it, the word is corrupted.

The second is that a computed jump was disassembled as a call. The twelve-bit core jumps with GOTO into the middle of a routine for skip tables, and a tool that mislabels the target as a subroutine entry will build a chain that does not exist in the machine.

The third is that the code is executing data. This is the interesting one and it is common on parts this small, because a 41-byte RAM budget pushes designers to store lookup tables in program memory and read them with CALL and RETLW. Those tables are legitimate and they are reached by call, but they are one level deep by construction. A table reached by call from inside a routine that was itself called is at level two, which is fine; a table reached from a table is impossible.

Data that decodes as a call

The RETLW table is the idiom that makes a 12-bit part feel larger than it is. A block of words, each one RETLW with a different literal, is indexed by adding an offset to the program counter and calling into the middle of the block. The return value is the literal.

For a disassembler this block is a trap in both directions. Read as code it is a subroutine that always returns a constant and never falls through, which looks plausible. Read as data it is a table of byte values, which is what the firmware intended. Telling the two apart needs the surrounding code: the CALL that reaches the block usually has its address computed a few instructions earlier from an index register.

The practical consequence for a delivery is that a raw disassembly of this part should not be presented as source. It should be presented as an image plus a listing, with the table blocks marked as tables. Customers who receive a flat listing where the tables are rendered as forty consecutive subroutines tend to conclude the recovery was scrambled.

Two pages and one status bit

1024 words is two pages of 512, and the page is chosen by a single bit in the status register. The bit is not restored automatically after a call returns, which is the detail that catches hand-written code and catches disassemblers even more often: a routine that switches page, calls within the new page and returns leaves the caller in the wrong page unless the caller put it back.

The stack and the page interact in exactly one way worth knowing. A CALL at the last address of page zero stores the return address correctly and pushes the programme counter into page one or into the call target, depending on how the bit was set. There is no hardware protection against a call whose target page does not match the bit. If the recovered image shows a call into the upper half and the page bit was clear at that point, either the bit was set by an instruction the disassembly skipped, or the word is a misread.

Using the constraint as a check

A verification pass on this part needs three steps and no simulator.

Build the call graph from the reset vector, following GOTO as a jump and CALL as an edge, and stopping at RETLW and RETURN. Record the maximum depth reached on any path. If it exceeds two, the image has a false edge, and the address of that edge is where to re-read first.

Then check that every CALL target lands inside 1024 words and, on the assumption that the design is ordinary code, that the target is a plausible entry rather than a word in the middle of a table. Entry points in hand-written assembly tend to be preceded by a RETLW or a GOTO, which is a weak signal but a useful one.

Finally check address zero. With one entry point and no interrupts, the reset vector must decode to a GOTO that lands in the lower page, or to a MOVLW that begins an oscillator-trim sequence. An image that fails this test is off by an offset, and no amount of downstream analysis repairs it.

For the sibling with half the array and no page bit, PIC12C508A firmware reversal shows where the simplification helps. For the same core in a twenty-pin package where paging runs to four pages, PIC16C57C firmware carries the argument further. And for a mid-range part where the stack is eight levels and the constraint disappears entirely, PIC16F72 secured data is the contrast.

FAQ

Does the part trap on stack overflow? No. The two-level stack is a ring of registers with no detection logic. An overflow returns to the wrong address and the program continues from there.

Can the stack contents be read? Not through any instruction or programming command. The return addresses are only observable indirectly, by watching where a program goes.

Why does a recovered listing show more subroutines than the firmware has? Because lookup tables written with RETLW are reached by CALL and look exactly like subroutines. They are data with a calling convention.

The short version

Two levels of stack, one entry point, one page bit, and a calibration word at the top. The stack is the free test: build the call graph, and any path that reaches three levels is a bad read rather than a bad design. Mark the RETLW tables as tables, verify address zero, and this part verifies more cleanly than most parts ten times its size.

An eight-pin package sounds like a limitation and is usually a design decision: the product needed a logic replacement, not a controller. The PIC12C508A offers six usable pins, 512 words of one-time-programmable program memory, 25 bytes of RAM and thirty-three instructions, and it is chosen precisely because a designer wants to replace a handful of gates and a comparator with a part that can be reprogrammed during development.

The awkward consequence is that three of those six pins are also the programming port. Reading the part in circuit therefore depends on how the designer spent the pin budget years earlier, and that single fact decides whether a recovery is a fifteen-minute job on the board or a removal, a fixture and a reflow.

Where the six pins go

pin	usual function in a product	role during programming
GP0	LED, relay driver, button	data line
GP1	sensor input, button	clock line
GP2	output, often shared with a jumper	free
GP3	reset, or an input-only pin when reset is disabled	high voltage and reset
GP4	oscillator or input	free
GP5	oscillator or output	free

Two rows are frequently unavailable without lifting something. GP0 and GP1 in a finished product usually drive or sense something that will not tolerate a clock train appearing on it, and GP3 in many designs carries a reset supervisor or a pull-up that fights the programming voltage.

The part in numbers

512 twelve-bit words, 25 bytes of RAM, a two-level hardware stack, a watchdog with its own prescaler, an internal RC oscillator trimmed by a factory calibration word at the top of the program map, and a configuration word that selects the oscillator mode, the watchdog, the reset pin function and the protection state. There are no interrupts and no data EEPROM, which is what keeps the silicon small enough for eight pins.

The absence of interrupts is not a footnote for recovery work. It means the instruction stream has exactly one entry point, at address zero, and no asynchronous context to reconstruct. A dump from this part reads as a single sequential program, which is why the 12-bit baseline core is the easiest architecture in this catalogue to verify after a read.

Why the calibration word forces a decision

The internal oscillator is trimmed at test and the trim value is stored as a MOVLW instruction at the highest program address. On the 508A that address is 0x1FF, and its content is different on every unit. A recovered image that includes it is a complete image; an image that omits it produces a clone that runs at an untrimmed frequency, typically several percent off nominal, which is enough to break a bit-banged serial protocol and enough to shift an RC timing loop out of specification.

This is one reason to prefer an in-circuit read when the board allows it. An off-board read is perfectly capable of returning the calibration word, but the handling that precedes it — desoldering an eight-pin device with hot air — carries a real risk of thermal damage, and a damaged die can lose the top of the map first.

What a populated board does to the read

Three effects appear repeatedly when a programmer is clipped onto a working assembly.

The first is loading. A pin that drives an LED through a resistor is harmless; a pin connected to a capacitor, a comparator input or a second device’s output is not. The programming interface is not a high-current bus and it does not negotiate.

The second is shared signals. If GP0 also reaches another chip’s data line, every read transaction appears on that line too. This rarely damages anything, but on a board with a second programmable device it can put the other part into a programming state at the wrong moment.

The third is the reset pin. When the configuration word has disabled the reset function to gain a sixth input, the pin no longer behaves like a reset, and the fixture must supply the high voltage in a way the design did not anticipate. On those units an in-circuit attempt fails silently: the programmer reports a device it cannot identify.

When removal is the correct answer

Removal is right when any of four conditions hold. The programming pins are committed to circuitry that cannot be isolated. The part is protected and the read has to go through the die rather than the pins, in which case the package is coming off anyway. The board is potted or conformally coated. Or the customer needs the unit back working and an in-circuit attempt has already put an unknown state into a pin that drives a power stage.

For an eight-pin part the mechanical risk is lower than most engineers assume: two rows of four, a small thermal mass, and a footprint that survives hot-air rework well. The risk is not the package, it is the handling of a part that no longer exists in stock, which is a scheduling question rather than a technical one.

What the recovered firmware looks like

A useful delivery for this part is short and specific: the 512-word array, the configuration word, the calibration word called out separately, and a note on which oscillator setting the board assumes. Because the core has one entry point and no interrupts, the image can be verified structurally in a way that larger parts do not allow: address zero must decode to a GOTO or a MOVLW, and every CALL target must land inside the array rather than in the eight unused words beyond it.

That verification catches the two failure modes that matter. A read that started at the wrong offset produces an image where address zero does not decode. A read that lost the top word produces an image where the last instruction is all ones — which is a legitimate value, so it must be flagged by position rather than by content.

For the same core with twice the array and a page boundary in the middle, PIC12C509A firmware recovery continues with the addressing consequences. For the twenty-pin part where the same protection logic applies to a much larger design, PIC16C57C firmware covers the paged case. And where the same die appears in a package with twelve I/O pins, PIC16F54C program recovery takes the wider view.

FAQ

Can the part be read with the programmer’s standard eight-pin clip? Mechanically yes, electrically only if the three programming pins are not loaded by the product circuitry. On a populated board, assume they are until measured.

Does the protection state stop an in-circuit attempt immediately? It stops it at the point where the programmer tries to read the array. Identification and the configuration word usually still answer, which is enough to confirm the part is present and protected rather than absent.

Is the calibration word recoverable if it was erased? Not from the same die. The correct route is a sibling unit from the same production batch, or a recalibration on a test bench, which is a different service from a memory recovery.

The short version

Six pins, three of them shared with the programmer, and a trim value at the top of the map that must travel with the image. Check the schematic before the soldering iron: the design decided this years ago, and the read either fits the decision or removes the part. The image itself is the easy part — one entry point, no interrupts, and a structural check that catches nearly every bad read.

Most microcontrollers of this generation let the designer choose a clock source by writing a configuration word, which means the choice survives in the part and can be read back. The PIC16C57C does not work that way. Its oscillator is decided when the part is ordered, sits in the device type itself, and is invisible to every command the programming interface offers. A recovery therefore delivers a firmware image plus a gap: the one design decision that matters most to timing has to be reconstructed from the board or from the customer’s memory of what they used to buy.

The rest of the device is familiar 12-bit core territory: 2048 words of one-time-programmable program memory, 72 bytes of RAM spread over three banks, twenty I/O pins across PORTA, PORTB and PORTC, thirty-three instructions and no interrupts.

The part in numbers

item	PIC16C57C
program memory	2048 by 12 bits, OTP
program pages	4, each 512 words
page select	PA1 and PA0 in the status register
data RAM	72 bytes, three banks
I/O	20 pins
stack	two levels, hardware
clock selection	fixed by order code, not by a bit
protection	two code-protect fuses

The last two rows are where this page differs from its neighbours. The stack depth is the same constraint every 12-bit part carries, but the clock row is unique to this class, and it is the one that turns a straightforward read into an incomplete delivery unless it is handled explicitly.

There is no oscillator bit to read

A PIC16C57C ordered as an RC part expects a resistor and capacitor on its clock pin. Ordered as XT it expects a crystal in the low megahertz range. Ordered as HS it expects a crystal that can drive the higher frequency the part is graded for. The die is the same across all three; the difference is the silicon that was characterised at test and, in practice, the mask option or the tested grade that the order code maps to.

This matters at read time because there is nothing in the image that names the clock. The configuration word carries the protection fuses and the watchdog enable, and that is all. Anyone who has read a PIC16F-class part first will look for an FOSC field, not find it, and assume the read was truncated.

It matters even more at rebuild time. A firmware image from an RC part, burned into an XT part, will run and will run at the wrong speed, because every delay loop in the program was tuned to an RC tolerance of a few tens of percent and the oscillator start-up behaviour the code waits for does not exist in the crystal configuration. The program does not fail immediately; it fails at the margins, which is worse.

Reading the clock off the board

Three methods work, in order of reliability.

The first is the order code on the part itself. The suffix that follows the temperature and package codes names the oscillator, and it is legible under magnification on most units before any decapsulation.

The second is the board. An RC configuration has two passive components next to the clock pins and no crystal; a crystal configuration has the crystal and two load capacitors; an HS design usually has a visibly higher-frequency crystal and shorter traces. This is reliable enough to distinguish the three families and unreliable for reading a frequency.

The third is the code. Delay routines carry the loop count in their immediate operands, and a loop that spends four hundred instruction cycles to produce one millisecond implies a clock of roughly 1.6 MHz, not 4. Working backwards from a timing constant is imprecise but it falsifies bad guesses quickly, which is what a triage needs.

Four pages and the bits that select them

2048 words is more than the nine-bit address field inside GOTO and CALL can reach. The part therefore splits the array into four pages of 512 words and puts the page selection in two status bits: PA1 and PA0. A call to an address in another page is really two operations, a status change and a call, and the page bits stay where they were put until something changes them.

For a disassembler this is the single structural hazard on the part. Following execution linearly across a page boundary without tracking PA1:PA0 produces a listing where the target of every cross-page call is wrong by 512, 1024 or 1536 words. The bytes are correct; the control flow graph is fiction. The same hazard exists on every member of the family above 512 words, which is why the 16C54 class is so much easier to read and so much easier to get right.

The practical rule: reconstruct the page state at every entry point, not once at the reset vector. A page change inside a subroutine that returns without restoring the previous page is legal, common in hand-written assembly, and invisible to a linear sweep.

What the configuration word does contain

Two fields, both consequential. The watchdog enable decides whether the program is written to service a timer that resets the part, and the two protection fuses decide whether the array reads at all. On an OTP device the protection fuses are physical: once blown they cannot be restored, and the array will not answer a read command again.

There is a subtlety in the protection encoding worth knowing before triage. Two fuses give four combinations, but only the fully open and fully blown states are documented as useful, and a part that reads halfway deserves suspicion rather than a code. Partial protection usually means a programming fixture that aborted mid-sequence or a die that was damaged in handling.

What “firmware” has to include here

The request says firmware, and on a part of this age the word implies more than the instruction stream. A complete delivery for a 16C57C contains the 2048-word array, the configuration word, and a written statement of the oscillator grade that the image assumes. The last item is not recoverable from the device and is the one that customers forget they need until the first rebuilt unit misbehaves.

Two file conventions also need stating, because the 12-bit core packs two words into three bytes and different tools disagree about the trailing nibble. A 2048-word image delivered as 3072 bytes is the packed convention; the same image delivered as 4096 bytes uses two bytes per word with the top four bits clear. Both are correct. Mixing them produces an image in which every word after the first is shifted by half a word, and the failure looks like a corrupt array rather than a formatting choice.

For the same array handled as a container rather than a device, PIC16C57 heximal file extraction deals with the file conventions in detail. For the smaller sibling where none of this paging exists, PIC16F54C program recovery covers the single-page case. And where the same fuse-based protection sits behind a different pin count, PIC16C56 code copying takes the parallel route.

FAQ

Can the oscillator grade be changed after recovery? Not on the die. The grade is a property of the part that was ordered. A rebuilt unit must use the same grade, or the firmware’s timing constants have to be rewritten, which is a development task rather than a recovery one.

Does a protected part still answer anything? The configuration word is often readable when the array is not, and on this family that is the only signal available. A part that returns a plausible configuration word and a repeating array pattern is protected, not damaged.

Is a 12-bit core worth reading in 2026? Constantly. Legacy industrial controllers, appliance boards and aftermarket automotive modules built in the nineteen-nineties are still in service, and the only copy of their firmware is on the part.

The short version

The PIC16C57C keeps its clock outside its memory. Read the order code, read the board, sanity-check against the delay loops, and deliver the array together with a written statement of the oscillator grade it assumes. Track the page bits through every entry point, keep the packing convention explicit, and the rest of this part behaves exactly like the rest of its family.

Going from a hundred pins to eighty costs general-purpose I/O and some convenience. Going from eighty to sixty-four costs channels — and channels are different, because a design can absorb losing a spare port pin and cannot absorb losing the eighth sensor input it was built around.

That is what makes the sixty-four-pin body the interesting member of this group. It is the point at which the capacitive touch interface and the converter stop being described by the silicon and start being described by the package.

The same peripheral with fewer electrodes

The touch sensing unit is the second generation of Renesas’ capacitive block: self-capacitance and mutual-capacitance modes, automatic judgement, multi-frequency scanning to dodge noise, and the ability to run in a low-power state and wake the core.

None of that changes with the package. What changes is how many electrodes can be connected, because each electrode occupies a pin, and the pins that reach the touch multiplexer are a subset of the package’s pins.

The same is true of the converter. Nineteen channels exist in the design; how many of them are bonded out depends on how many pins the package has, and the higher-numbered channels are the ones that go first.

resource	LQFP80	LQFP64	effect on a design
touch electrodes	more	fewer	key count, or a different sensing layout
converter channels	more	fewer	sensor count, or external multiplexing
serial flow control	often present	usually absent	software flow control
general-purpose I/O	more	fewer	serial peripherals instead of parallel

The scan table is a data structure in flash

A touch design is not written as nineteen separate handlers. It is written as a table: which channels are enabled, what threshold applies to each, what baseline each channel settled on, and in what order the scan proceeds. That table lives in flash, is read at start-up, and is updated in RAM as the baselines drift.

For a reader this is the most informative structure in the whole image, because it states the design’s physical layout in numbers. The number of entries says how many electrodes the product has. The threshold column says how sensitive the design needed to be, which correlates with overlay thickness and electrode size. The baseline column says what the raw counts look like on a real board, which is the single most useful figure for anyone rebuilding the product.

A table with twelve entries read out of a firmware that was written for a hundred-pin board tells you either that only twelve electrodes were used, or that the build was retargeted. The distinction is usually visible from whether the unused entries are absent or present-and-disabled.

The converter sequence as a second fingerprint

The converter is configured with a channel sequence, and the sequence order is a design decision, not an accident. A design that reads a strain gauge, then a temperature sensor, then a battery voltage, will have those three channels in that order, because the sequence determines the settle time between conversions.

Reading the sequence gives the same information the touch table gives: how many analogue inputs the product actually uses, and in what priority. Combined with the touch table it produces a complete inventory of the product’s sensing surface, which for many customers is more valuable than the code.

what the image states	where it lives	what it tells a customer
enabled touch channels	channel occupancy register image	number of keys or sliders
per-channel thresholds	constant table	sensitivity and overlay assumptions
baseline values	initialised table	raw counts on a real board
converter sequence	sequence registers set at start-up	which physical quantities are measured
averaging counts	loop bounds	resolution versus sample rate

What happens when a larger build is restored smaller

Restoring a hundred-pin image onto a sixty-four-pin part produces a specific failure signature, and it is worth recognising because it looks like a firmware bug rather than a package mismatch.

Start-up completes. The touch scan runs and returns values. The converter runs and returns values. But the channels above the package’s limit return either the last value latched or a constant, because the input is not connected to anything. The firmware has no way to know: from its point of view the conversion completed successfully.

The result is a device that appears to work and reports a fixed reading for the inputs that do not exist. On a touch panel this shows up as a key that is always pressed or always released; on a sensor input it shows up as a channel stuck at full scale or at zero.

Reading order for this package

1. Vector table: confirm base address, byte order, and that the image is complete.
2. Clock configuration: establish the operating frequency, because every timing constant depends on it.
3. Port configuration: collect the set of port bits and function selects written at start-up, which states the package the build expected.
4. Touch table: count entries and read thresholds and baselines.
5. Converter sequence: count channels and note the order.
6. Everything else.

Steps three to five answer the package question from three independent directions, and they take less time than reading the main loop.

What the deliverable contains

The return set is the code flash image at 256 KB, the data flash separately, the configuration words, the identification words as read, a disassembly with the vector table resolved, and the extracted tables: touch channels with thresholds and baselines, and the converter sequence.

Those extracted tables are usually the part of the report a customer reads first, because they describe the product rather than the program.

The step down from eighty pins, and what it costs in general-purpose I/O rather than channels, is in R7FA2L1AB3CFN program recovery. The hundred-pin member and its field-by-field decoding are in R7FA2L1AB3CFP software extraction. A full treatment of the touch unit itself is at R7FA2L1A93CFM firmware recovery.

FAQ

Does the silicon have fewer touch channels on this package? The block is the same. What changes is how many of its inputs are bonded to pins.

Why does an unbonded converter channel not report an error? The conversion completes on whatever the input network presents. With no pin, that is not a signal, and the result is a constant rather than a fault.

Can a sixty-four-pin design be identified without the code? Sometimes, from the board. From the image it is straightforward, because the channel tables state it.

Conclusion

Sixty-four pins is where this group stops being a slightly smaller hundred-pin part and starts being a different product. The touch and converter front ends are limited by the package, and the firmware records those limits in tables that are easy to find and easy to read. Locating them answers the package question, the sensor-count question and, often, the customer’s actual question about what the device measured.